		Raid Ayoub

	Email:	rayoub(at)ucsd(dot)edu
	EX-Office:	EBU3B, Room 2148
	EX-Address:	9500 Gilman Drive, Mail code - 0404
		La Jolla, CA, 92093

I graduated with a Ph.D. degree in Computer Engineering from the department of Computer Science and Engineering at the University of California, San Diego in summer 2011. I received my B.S. and M.S. Degrees in Electrical Engineering from the University of Technology (Baghdad/Iraq)

During my Ph.D. I worked with Professor Tajana Simunic Rosing. My research interests is in energy and thermal management for computer systems, high-end server machines as well as mobile devices.

I now work for Intel research labs in Hillsboro. Here is my resume

Publications:

Journals:
R. Ayoub, K. R. Indukuri, T. S. Rosing, Temperature Aware Dynamic Workload Scheduling in Multisocket CPU Servers. IEEE Transactions in Computer Aided Design of Integrated Circuits and Systems, 2011.

Conferences:
R. Ayoub, R. Nath, T. Rosing. JETC: Joint Energy Thermal and Cooling Management for Memory and CPU Subsystems in Servers. HPCA, 2012.

S. Sharifi, R. Ayoub, T. Rosing. TempoMP: Integrated Prediction and Management of Temperature in Heterogeneous MPSoCs. DATE, 2012.

R. Ayoub, U. Ogras, E. Gorbatov, Yanqin Jin, K. Timothy, P. Diefenbaugh, T. Rosing. OS-level Power Minimization Under Tight Performance Constraints in General Purpose Systems. ISLPED 2011.

R. Ayoub, K. R. Indukuri, T. Rosing. Energy Efficient Proactive Thermal Management in Memory Subsystem. ISLPED, 2010.

R. Ayoub, S. Sharifi, T. Rosing. GentleCool: Cooling Aware Proactive Workload Scheduling in Multi-Machine Systems. DATE, 2010.

R. Ayoub, T. Rosing. Cool and Save: Cooling Aware Dynamic Workload Scheduling in Multi-socket CPU Systems. ASP-DAC, 2010.

R. Ayoub, A. Orailoglu. Performance and Energy Efficient Cache Migration Approach for Thermal Management in Embedded Systems. GLSVLSI, 2010.

R. Ayoub, T. Rosing. Predict and act: dynamic thermal management for multi-core processors. ISLPED, 2009.

G. Dhiman, R. Ayoub, T. Rosing. PDRAM: A Hybrid PRAM and DRAM Main Memory System. DAC 2009.

R. Ayoub, A. Orailoglu. Filtering Global History: Power and Performance Efficient Branch Predict. ASAP 2009.

R. Ayoub, A. Orailoglu. Power efficient register file update approach for embedded processors. ICCD, 2007.

R. Ayoub, A. Orailoglu. Low Power Branch Predictor for Application Specific Processors. WASP, 2005.

R. Ayoub, A. Orailoglu. A Unified Transformational Approach for Reductions in Fault Vulnerability, Power, and Crosstalk oise & Delay on Processor Buses. ASP-DAC, 2005.

R. Ayoub, P. Petrov, A. Orailoglu. Instruction Memory Transformations for reductions in Power and Fault Vulnerability on Embedded Processors. SOCC, 2004.

Internships:

Intel research labs (spring 2010)

OS-level power aware optimizations under performance constraints in general purpose systems

Cisco (summer 2007)

Power estimation and optimizations at the microarchitectural and RTL levels